OpenLTE: Instalasi

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Sumber: https://sourceforge.net/p/openlte/wiki/Installing%20OpenLTE/


Prerequisites:

  • USB3 interface
  • Modern multicore CPU (Intel Core i5, Core i7 or equivalent with SSE4.1 SSE4.2 and AVX support)
  • UHD driver installed (for Ettus SDRs)
  • GNURADIO

Setup your computer:

OpenLTE is not only requiring a huge amount of processing power, but it also requires a very low latency due its need to transmit/receive a radio frame every 1ms. If there is any delay in the processing, the system will not going to be able respond in time and will lose samples. Therefor it is recommended to switch of any CPU and/or system features (mostly in your BIOS) which can cause any delays or can slow down the so called context switching time. Intel SpeedStep, deep and deeper sleep states etc. should be turned off. Especially with high bandwidth setups (10, 15 and 20MHz) it is recommended to swtich off the GUI on linux. There is also a low latency edition of the linux kernel, but at this point there is no absolute proof that it actually helps with OpenLTE.


Installing GNURadio with UHD:

With an Ettus radio (B200, B210) you will need the latest UHD driver besides GNURadio.

I recomend not to use the binary version but to compile to code with UHD like the following:

As a non-root user, give the following command:

mkdir gnuradio
cd gnurdio
wget http://www.sbrac.org/files/build-gnuradio
chmod a+x build-gnuradio

./build-gnuradio -v

You will be asked for the root password by the install script. The whole procedure can take up to 3 hours! It will download GNURadio , UHD and all the necessary dependencies.

Check the communication with your Ettus SDR:

Connect your SDR to one of the USB3 interfaces, and run:

uhd_usrp_probe

The software will load the FPGA code to your device, and queries your device. If you done everything right, you should see something similar:

linux; GNU C++ version 4.8.2; Boost_105400; UHD_003.008.001-42-g8c87a524

-- Operating over USB 3.
-- Initialize CODEC control...
-- Initialize Radio control...
-- Performing register loopback test... pass
-- Performing CODEC loopback test... pass
-- Asking for clock rate 32.000000 MHz...
-- Actually got clock rate 32.000000 MHz.
-- Performing timer loopback test... pass
-- Setting master clock rate selection to 'automatic'.
  _____________________________________________________
 /
|       Device: B-Series Device
|     _____________________________________________________
|    /
|   |       Mboard: B200
|   |   revision: 4
|   |   product: 1
|   |   serial: F54xxx
|   |   FW Version: 7.0
|   |   FPGA Version: 4.0
|   |
|   |   Time sources: none, internal, external, gpsdo
|   |   Clock sources: internal, external, gpsdo
|   |   Sensors: ref_locked
|   |     _____________________________________________________
|   |    /
|   |   |       RX DSP: 0
|   |   |   Freq range: -16.000 to 16.000 MHz
|   |     _____________________________________________________
|   |    /
|   |   |       RX Dboard: A
|   |   |     _____________________________________________________
|   |   |    /
|   |   |   |       RX Frontend: A
|   |   |   |   Name: FE-RX2
|   |   |   |   Antennas: TX/RX, RX2
|   |   |   |   Sensors:
|   |   |   |   Freq range: 50.000 to 6000.000 MHz
|   |   |   |   Gain range PGA: 0.0 to 73.0 step 1.0 dB
|   |   |   |   Connection Type: IQ
|   |   |   |   Uses LO offset: No
|   |   |     _____________________________________________________
|   |   |    /
|   |   |   |       RX Codec: A
|   |   |   |   Name: B200 RX dual ADC
|   |   |   |   Gain Elements: None
|   |     _____________________________________________________
|   |    /
|   |   |       TX DSP: 0
|   |   |   Freq range: -16.000 to 16.000 MHz
|   |     _____________________________________________________
|   |    /
|   |   |       TX Dboard: A
|   |   |     _____________________________________________________
|   |   |    /
|   |   |   |       TX Frontend: A
|   |   |   |   Name: FE-TX2
|   |   |   |   Antennas: TX/RX
|   |   |   |   Sensors:
|   |   |   |   Freq range: 50.000 to 6000.000 MHz
|   |   |   |   Gain range PGA: 0.0 to 89.8 step 0.2 dB
|   |   |   |   Connection Type: IQ
|   |   |   |   Uses LO offset: No
|   |   |     _____________________________________________________
|   |   |    /
|   |   |   |       TX Codec: A
|   |   |   |   Name: B200 TX dual DAC
|   |   |   |   Gain Elements: None 

Installing PolarSSL

On Ubuntu and Debian system, use the following command:

sudo apt-get install libpolarssl-dev

Get the code:

You can get the latest version of the OpenLTE code at:

https://sourceforge.net/projects/openlte/files/

Download and extract the latest version and go to the extracted folder. Configuring and compiling the code:

mkdir build
cd build
sudo cmake ../
sudo make
sudo make install

Now you are ready to start your own LTE eNodeB.





Referensi