Difference between revisions of "List of Intel Core 2 microprocessors"

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(New page: The '''Core 2''' brand refers to Intel's x86/x86-64 microprocessors (with the eighth-generation microarchitecture, named Core architecture) targeted at the cons...)
 
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* [[Die (integrated circuit)|Die]] size: 111 mm² (Allendale), 143 mm² (Conroe)
 
* [[Die (integrated circuit)|Die]] size: 111 mm² (Allendale), 143 mm² (Conroe)
 
* [[Stepping (version numbers)|Steppings]]:[[Intel_Core_(microarchitecture)#Steppings_using_65nm_process|B2, G0]] (Conroe), [[Intel_Core_(microarchitecture)#Steppings_using_65nm_process|L2]] (Allendale)
 
* [[Stepping (version numbers)|Steppings]]:[[Intel_Core_(microarchitecture)#Steppings_using_65nm_process|B2, G0]] (Conroe), [[Intel_Core_(microarchitecture)#Steppings_using_65nm_process|L2]] (Allendale)
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{{cpulist|core|head}}
 
 
{{cpulist|core|conroe|model=Core 2 Duo E6300|sspec1=SL9SA|step1=B2|freq=1866|l2=2|fsb=1066|mult=7|vmin=0.85|vmax=1.3525|date=July 27, 2006|part1=HH80557PH0362M|price=$183|links=1}}
 
{{cpulist|core|conroe|model=Core 2 Duo E6300|sspec1=SL9SA|step1=B2|freq=1866|l2=2|fsb=1066|mult=7|vmin=0.85|vmax=1.3525|date=July 27, 2006|part1=HH80557PH0362M|price=$183|links=1}}
 
|Core 2 Duo E6320 || SLA4U (B2) || 1866 MHz || 4 MB || 1066 MT/s || 7x || 0.85 - 1.325 V || 65 W || LGA 775 || April 22, 2007 || HH80557PH0364M || $163
 
|Core 2 Duo E6320 || SLA4U (B2) || 1866 MHz || 4 MB || 1066 MT/s || 7x || 0.85 - 1.325 V || 65 W || LGA 775 || April 22, 2007 || HH80557PH0364M || $163

Revision as of 13:02, 10 February 2010

The Core 2 brand refers to Intel's x86/x86-64 microprocessors (with the eighth-generation microarchitecture, named Core architecture) targeted at the consumer and business markets (except the servers) above Pentium Dual-Core. The Core 2 Duo branch covered dual-core CPUs for both desktop and notebook computers, Core 2 Quad - quad-core CPUs for both desktop and notebook computers, and Core 2 Extreme - dual-core and quad-core CPUs for both desktop and notebook computers.

Desktop processors

Dual-Core Desktop processors

Core 2 Duo

"Allendale" (65 nm)

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Template:Note label Note: The L2 Stepping as well as the models with sSpec SL9ZL, SL9ZF, SLA4U, SLA4T have better optimizations to lower the idle power consumption from 22W to 12W.

Note: The M0 and G0 Steppings have better optimizations to lower idle power consumption from 12W to 8W.

See also: Versions of the same Allendale core with half the L2 cache disabled are available under the Pentium Dual-Core brand.

"Conroe" (65 nm)

Template:Cpulist |Core 2 Duo E6320 || SLA4U (B2) || 1866 MHz || 4 MB || 1066 MT/s || 7x || 0.85 - 1.325 V || 65 W || LGA 775 || April 22, 2007 || HH80557PH0364M || $163 |- |Core 2 Duo E6300 || SL9TA (L2) || 1866 MHz || 2 MB || 1066 MT/s || 7x || 1.225 - 1.325 V || 65 W || LGA 775 || January 2007 || HH80557PH0362M || $183 |- |Core 2 Duo E6400 || SL9S9 (B2) || 2133 MHz || 2 MB || 1066 MT/s || 8x || 0.85 - 1.3525 V || 65 W || LGA 775 || July 27, 2006 || HH80557PH0462M || $224 |- |Core 2 Duo E6400 || SL9T9 (L2) || 2133 MHz || 2 MB || 1066 MT/s || 8x || 1.225 - 1.325 V || 65 W || LGA 775 || January 2007 || HH80557PH0462M || $224 |- |Core 2 Duo E6420 || SLA4T (B2) || 2133 MHz || 4 MB || 1066 MT/s || 8x || 1.187 - 1.325 V || 65 W || LGA 775 || April 22, 2007 || HH80557PH0464M || $183 |- |Core 2 Duo E6540Template:Ref label|| SLAA5 (G0) || 2333 MHz || 4 MB || 1333 MT/s || 7x || 0.962 - 1.350 V || 65 W || LGA 775 || July 22, 2007 || HH80557PJ0534M || $163 |- |Core 2 Duo E6550 || SLA9X (G0) || 2333 MHz || 4 MB || 1333 MT/s || 7x || 0.962 - 1.350 V || 65 W || LGA 775 || July 22, 2007 || HH80557PJ0534MG || $163 |- |Core 2 Duo E6600 || SL9S8, SL9ZL (B2)Template:Ref label || 2400 MHz || 4 MB || 1066 MT/s || 9x || 0.85 - 1.325 V || 65 W || LGA 775 || July 27, 2006 || HH80557PH0564M || $316 |- |Core 2 Duo E6700 || SL9S7, SL9ZF (B2)Template:Ref label || 2667 MHz || 4 MB || 1066 MT/s || 10x || 0.85 - 1.325 V || 65 W || LGA 775 || July 27, 2006 || HH80557PH0674M || $530 |- |Core 2 Duo E6750 || SLA9V (G0) || 2667 MHz || 4 MB || 1333 MT/s || 8x || 0.962 - 1.350 V || 65 W || LGA 775 || July 22, 2007 || HH80557PJ0674MG || $183 |- |Core 2 Duo E6850 || SLA9U (G0) || 3000 MHz || 4 MB || 1333 MT/s || 9x || 0.962 - 1.350 V || 65 W || LGA 775 || July 22, 2007 || HH80557PJ0804MG || $266 Template:End

Template:Note labelNote: The E6540 does not support Intel's TXT.

"Conroe-CL" (65 nm)

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"Wolfdale-3M" (45 nm)

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"Wolfdale" (45 nm)

Template:Cpulist Template:Cpulist |Core 2 Duo E8200 || SLAPP (C0) || 2667 MHz || 6 MB || 1333 MT/s || 8x || 0.85 – 1.3625 V || 65 W || LGA 775 || January 20, 2008 || EU80570PJ0676M || $163 |- |Core 2 Duo E8300 || SLAPJ (C0)
SLAPN (C0) || 2833 MHz || 6 MB || 1333 MT/s || 8.5x || 0.85 – 1.3625 V || 65 W || LGA 775 || April 20, 2008 || EU80570AJ0736M
EU80570PJ0736M || $163 |- |rowspan=2| Core 2 Duo E8400 || SLAPL (C0) || rowspan=2| 3000 MHz || rowspan=2| 6 MB || rowspan=2| 1333 MT/s || rowspan=2| 9x || rowspan=2| 0.85 – 1.3625 V || rowspan=2| 65 W || rowspan=2| LGA 775 || January 20, 2008 || EU80570PJ0806M || $183 |- |SLB9J (E0) || July 18, 2008 || AT80570PJ0806M || $183 |- |rowspan=2| Core 2 Duo E8500 || SLAPK (C0) || rowspan=2| 3166 MHz || rowspan=2| 6 MB || rowspan=2 | 1333 MT/s || rowspan=2| 9.5x || rowspan=2| 0.85 – 1.3625 V || rowspan=2| 65 W || rowspan=2|LGA 775 || January 20, 2008 || EU80570PJ0876M || $266 |- |SLB9K (E0) || || AT80570PJ0876M || |- | Core 2 Duo E8600 || SLB9L (E0) || 3333 MHz || 6 MB || 1333 MT/s || 10x || 0.85 - 1.3625 V || 65 W || LGA 775 || August 10, 2008 || AT80570PJ0936M || $266 Template:End

Template:Note labelNote: E8190 does not support Intel Virtualization Technology.

See also: Versions of the same Wolfdale core in an LGA 771 are available under the Dual-Core Xeon brand.

Core 2 Extreme

"Conroe XE" (65 nm)

These models features an unlocked clock multiplier

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Quad-Core Desktop processors

Core 2 Quad

"Kentsfield" (65 nm)

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"Yorkfield-6M" (45 nm)

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"Yorkfield" (45 nm)

Template:Cpulist Template:Cpulist |rowspan=2| Core 2 Quad Q9550 || SLAWQ (C1) ||rowspan=2| 2833 MHz ||rowspan=2| 2 × 6 MB ||rowspan=2| 1333 MT/s ||rowspan=2| 8.5x ||rowspan=2| 0.85 – 1.3625 V ||rowspan=2| 95 W ||rowspan=2| LGA 775 || March 2008 || EU80569PJ073N || $530 |- |SLB8V (E0) || August 2008 || AT80569PJ073N || $316 |- | Core 2 Quad Q9550S || SLGAE (E0) || 2833 MHz || 2 × 6 MB || 1333 MT/s || 8.5x || 0.85 – 1.3625 V || 65 W || LGA 775 || January 18, 2009 || AT80569AJ073N || $369 |- | Core 2 Quad Q9650 || SLB8W (E0) || 3000 MHz || 2 × 6 MB || 1333 MT/s || 9x || 0.85 – 1.3625 V || 95 W || LGA 775 || August 10, 2008 || AT80569PJ080N || $530 Template:End

Core 2 Extreme

"Kentsfield XE" (65 nm)

These models feature an unlocked clock multiplier

Template:Cpulist Template:Cpulist |rowspan=2|Core 2 Extreme QX6800 || SL9UK (B3) ||rowspan=2| 2933 MHz ||rowspan=2| 2 × 4 MB ||rowspan=2| 1066 MT/s ||rowspan=2| 11x ||rowspan=2| 1.1 - 1.372 V ||rowspan=2| 130 W ||rowspan=2| LGA 775 || April 9, 2007 || HH80562PH0778M || $1199 |- |SLACP (G0) || July 16, 2007 || HH80562XH0778M || $999 |- Template:Cpulist Template:End

"Yorkfield XE" (45 nm)

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Notebook (mobile) processors

Single-Core Notebook processors

Core 2 Solo

"Merom-L" (ultra-low-voltage, 65 nm)

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"Penryn-L" (ultra-low-voltage, 45 nm, Small Form Factor)

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Dual-Core Notebook processors

Core 2 Duo

"Merom", "Merom-2M" (standard-voltage, 65 nm) Template:Anchors
  • All models support: MMX, SSE, SSE2, SSE3, SSSE3, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), iAMT2 (Intel Active Management)
  • Model 7600G features an unlocked clock multiplier and can be overclocked up to 3.16 GHz.
  • Intel VT: Supported by T5500 (those with stepping L2 only), T5600 and all T7xxx
  • Intel Dynamic Front Side Bus Frequency Switching: Supported by E1, G0, G2, M0 Steppings
  • Socket P processors are capable of throttling the FSB anywhere between 400-800 MHz as necessary.
  • Die size: 143 mm² (Merom), 111 mm² (Merom-2M)
  • Steppings: B2, E1, G0, G2 (Merom), L2, M0 (Merom-2M)

Template:Cpulist Template:Cpulist |Core 2 Duo T5250 || SLA9S (M0) || 1500 MHz || 2 MB || 667 MT/s || 9x || 1.0375 - 1.3 V || 35 W || Socket P || Q2 2007 || LF80537GF0212M || OEM |- |Core 2 Duo T5270 || SLALK (M0) || 1400 MHz || 2 MB || 800 MT/s || 7x || 1.0375 - 1.3 V || 35 W || Socket P || October 2007 || LF80537GG0172M || OEM |- |Core 2 Duo T5300 || SL9WE (L2) || 1733 MHz || 2 MB || 533 MT/s || 13x || 1.0375 - 1.3 V || 34 W || Socket M || Q1 2007 || LF80537GE0302M || OEM |- |Core 2 Duo T5450 || SLA4F (M0) || 1667 MHz || 2 MB || 667 MT/s || 10x || 1.0375 - 1.3 V || 35 W || Socket P || Q2 2007 || LF80537GF0282MT || OEM |- |Core 2 Duo T5470 || SLAEB (M0) || 1600 MHz || 2 MB || 800 MT/s || 8x || 1.0375 - 1.3 V || 35 W || Socket P || July 2007 || LF80537GG0252M || OEM |- |rowspan=2 |Core 2 Duo T5500 || SL9SH (B2)
SLGFK (G2) ||rowspan=2 | 1667 MHz ||rowspan=2 | 2 MB ||rowspan=2 | 667 MT/s ||rowspan=2 | 10x ||rowspan=2 | 1.0375 - 1.3 V ||rowspan=2 | 34 W || Socket M ||rowspan=2 | August 28, 2006 || LF80537GF0282M ||rowspan=2 | $209 |- | SL9SQ (B2) || FCBGA6 || LE80537GF0282M |- |rowspan=2 |Core 2 Duo T5500 || SL9U4 (L2)
SLA4F (M0)||rowspan=2 | 1667 MHz ||rowspan=2 | 2 MB ||rowspan=2 | 667 MT/s ||rowspan=2 | 10x ||rowspan=2 | 1.0375 - 1.3 V ||rowspan=2 | 34 W || Socket M ||rowspan=2 | Q1 2007 || LF80537GF0282M ||rowspan=2 | $209 |- | SL9U8 (L2) || FCBGA6 || LE80537GF0282M |- |Core 2 Duo T5550 || SLA4E (M0) || 1833 MHz || 2 MB || 667 MT/s || 11x || 1.075 - 1.175 V || 35 W || Socket P || January 2008 || LF80537GF0342MT || OEM |- |rowspan=2 |Core 2 Duo T5600 || SL9SG (B2) ||rowspan=2 | 1833 MHz ||rowspan=2 | 2 MB ||rowspan=2 | 667 MT/s ||rowspan=2 | 11x ||rowspan=2 | 1.0375 - 1.3 V ||rowspan=2 | 34 W || Socket M || rowspan=2 |August 28, 2006 || LF80537GF0342M ||rowspan=2 | $241 |- | SL9SP (B2) || FCBGA6 || LE80537GF0342M |- |rowspan=2 |Core 2 Duo T5600 || SL9U3 (L2)
SLA4E (M0) ||rowspan=2 | 1833 MHz ||rowspan=2 | 2 MB ||rowspan=2 | 667 MT/s ||rowspan=2 | 11x ||rowspan=2 | 1.0375 - 1.3 V ||rowspan=2 | 34 W || Socket M ||rowspan=2 | Q1 2007 || LF80537GF0342M ||rowspan=2 | $241 |- | SL9U7 (L2) || FCBGA6|| LE80537GF0342M |- |Core 2 Duo T5670 || SLAJ5 (M0) || 1800 MHz || 2 MB || 800 MT/s || 9x || 1.0375 - 1.3 V || 35 W || Socket P || Q2 2008 || LF80537GG0332MN || OEM |- |Core 2 Duo T5750 || SLA4D (M0) || 2000 MHz || 2 MB || 667 MT/s || 12x || 1.0375 - 1.3 V || 35 W || Socket P || January 2008 || LF80537GF0412M || OEM |- |Core 2 Duo T5800 || SLB6E (M0) || 2000 MHz || 2 MB || 800 MT/s || 10x || 1.0375 - 1.3 V || 35 W || Socket P || March 2008 || LF80537GG041F || OEM |- |Core 2 Duo T5850 || SLA4C (M0) || 2167 MHz || 2 MB || 667 MT/s || 13x || 1.0375 - 1.3 V || 35 W || Socket P || March 2008 || LF80537GF0482M || OEM |- |Core 2 Duo T5870 || SLAZR (M0) || 2000 MHz || 2 MB || 800 MT/s || 10x || 1.0375 - 1.3 V || 35 W || Socket P || 2008 || LF80537GG0412MN || OEM |- |Core 2 Duo T5900 || SLB6D (M0) || 2200 MHz || 2 MB || 800 MT/s || 11x || 1.0375 - 1.3 V || 35 W || Socket P || || LF80537GG049F || OEM |- |rowspan=2 |Core 2 Duo T7100 || SLA4A (M0) ||rowspan=2 | 1800 MHz ||rowspan=2 | 2 MB ||rowspan=2 | 800 MT/s ||rowspan=2 | 9x ||rowspan=2 | 0.900 - 1.175 V ||rowspan=2 | 35 W || Socket P ||rowspan=2 | May 9, 2007 || LF80537GG0332M ||rowspan=2 | $209 |- | SLA3U (M0) || FCBGA6 || LE80537GG0332M |- |rowspan=2 |Core 2 Duo T7250 || SLA49 (M0) || rowspan=2 |2000 MHz || rowspan=2 |2 MB || rowspan=2 |800 MT/s || rowspan=2 |10x || rowspan=2 |1.075 - 1.175 V || rowspan=2 |35 W || Socket P || rowspan=2 |September 2, 2007 || LF80537GG0412M || rowspan=2 | $290 |- | SLA3T (M0) || FCBGA6 || LE80537GG0412M |- |rowspan=2 |Core 2 Duo T7200 || SL9SF (B2) ||rowspan=2 | 2000 MHz ||rowspan=2 | 4 MB ||rowspan=2 | 667 MT/s ||rowspan=2 | 12x ||rowspan=2 | 1.0375 - 1.3 V ||rowspan=2 | 34 W || Socket M ||rowspan=2 | August 28, 2006 || LF80537GF0414M ||rowspan=2 | $294 |- | SL9SL (B2) || FCBGA6 || LE80537GF0414M |- |-|rowspan=2 |Core 2 Duo T7250 || SLA3T (M0) ||rowspan=2 | 2000 MHz ||rowspan=2 | 4 MB ||rowspan=2 | 800 MT/s ||rowspan=2 | 10x ||rowspan=2 | 1.075 - 1.175 V ||rowspan=2 | 35 W || Socket M ||rowspan=2 | [Unknown] || LF80537GG0414M ||rowspan=2 |- |rowspan=2 |Core 2 Duo T7300 || SLA45 (E1) ||rowspan=2 | 2000 MHz ||rowspan=2 | 4 MB ||rowspan=2 | 800 MT/s ||rowspan=2 | 10x ||rowspan=2 | 1.0375 - 1.3 V ||rowspan=2 | 35 W || Socket P ||rowspan=2 | May 9, 2007 || LF80537GG0414M ||rowspan=2 | $241 |- | SLA3P (E1) || FCBGA6 || LE80537GG0414M |- |rowspan=2 |Core 2 Duo T7400 || SL9SE (B2)
SLGFJ (G2) ||rowspan=2 | 2166 MHz ||rowspan=2 | 4 MB ||rowspan=2 | 667 MT/s ||rowspan=2 | 13x ||rowspan=2 | 1.0375 - 1.3 V ||rowspan=2 | 34 W || Socket M ||rowspan=2 | August 28, 2006 || LF80537GF0484M ||rowspan=2 | $423 |- | SL9SK (B2)
SLGFV (G2) || FCBGA6 || LE80537GF0484M |- |rowspan=4 |Core 2 Duo T7500 || SLA44 (E1) ||rowspan=4 | 2200 MHz ||rowspan=4 | 4 MB ||rowspan=4 | 800 MT/s ||rowspan=4 | 11x ||rowspan=4 | 1.0375 - 1.3 V ||rowspan=4 | 35 W || Socket P ||rowspan=2 | May 9, 2007 || LF80537GG0494M ||rowspan=2 | $316 |- | SLA3N (E1) || FCBGA6 || LE80537GG0494M |- | SLAF8 (G0) || Socket P ||rowspan=2 |September 2, 2007 || LF80537GG0494M ||rowspan=2 | $241 |- | SLADM (G0) || FCBGA6 || LE80537GG0494M |- |rowspan=2 |Core 2 Duo T7600 || SL9SD (B2) ||rowspan=2 | 2333 MHz ||rowspan=2 | 4 MB ||rowspan=2 | 667 MT/s ||rowspan=2 | 14x ||rowspan=2 | 1.0375 - 1.3 V ||rowspan=2 | 34 W || Socket M ||rowspan=2 | August 28, 2006 || LF80537GF0534M ||rowspan=2 | $637 |- | SL9SJ (B2) || FCBGA6 || LE80537GF0534M |- |Core 2 Duo T7600G || SL9SD (B2) || 2333 MHz || 4 MB || 667 MT/s || 14x || N/A || N/A || Socket M || December, 2006 || LF80537GF0534MU || N/A |- |rowspan=4 |Core 2 Duo T7700 || SLA43 (E1) ||rowspan=4 | 2400 MHz ||rowspan=4 | 4 MB ||rowspan=4 | 800 MT/s ||rowspan=4 | 12x ||rowspan=4 | 1.0375 - 1.3 V ||rowspan=4 | 35 W || Socket P ||rowspan=2 | May 9, 2007 || LF80537GG0564M ||rowspan=2 | $530 |- | SLA3M (E1) || FCBGA6 || LE80537GG0564M |- | SLAF7 (G0) || Socket P ||rowspan=2 |September 2, 2007 || LF80537GG0564M ||rowspan=2 | $316 |- | SLADL (G0) || FCBGA6 || LE80537GG0564M |- |rowspan=2 |Core 2 Duo T7800 || SLAF6 (G0) || rowspan=2 |2600 MHz ||rowspan=2 |4 MB ||rowspan=2 |800 MT/s ||rowspan=2 |13x ||rowspan=2 |1.0375 - 1.3 V ||rowspan=2 |35 W || Socket P ||rowspan=2 |September 2, 2007 || LF80537GG0644ML ||rowspan=2 | $530 |- | SLA75 (G0) || FCBGA6 || LE80537GG0644M |}

See also: Versions of the same Merom-2M core with half the L2 cache disabled are available under the Pentium Dual-Core brand.

"Merom" (low-voltage, 65 nm)

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"Merom-2M" (ultra-low-voltage, 65 nm)

Template:Cpulist Template:Cpulist Template:Cpulist |- |rowspan=2|Core 2 Duo U7600 || SLA2U (L2)
SLAUS (M0) ||rowspan=2| 1200 MHz ||rowspan=2| 2 MB ||rowspan=2| 533 MT/s ||rowspan=2| 9x ||rowspan=2| 0.750 - 0.925 V ||rowspan=2| 10 W || FCBGA6 (Socket M) || April 5, 2007 ||rowspan=2| LE80537UE0092M ||rowspan=2| $289 |- |SLV3W (M0) || FCBGA6 (Socket P)|| April 2007 |- |rowspan=2|Core 2 Duo U7700 || SLA6X (L2)
SLAUR (M0) ||rowspan=2|1333 MHz ||rowspan=2| 2 MB ||rowspan=2| 533 MT/s ||rowspan=2| 10x ||rowspan=2| 0.80 - 0.975 V ||rowspan=2| 10 W ||FCBGA6 (Socket M) || December 30, 2007 ||rowspan=2| LE80537UE0142M ||rowspan=2|$289 |- |SLV3V (M0) || FCBGA6 (Socket P)|| February 2008 |}

"Penryn" (Apple iMac specific, 45 nm)
  • Die size: 107 mm²
  • The 2008 20" iMac used the E8135 and E8335 CPUs at a lower than specified clock frequency, explaining why the same model is used at different frequencies. This list shows the frequencies used by Apple.
  • Steppings: C0, E0

Template:Cpulist Template:Cpulist Template:Cpulist Template:Cpulist Template:Cpulist Template:Cpulist Template:Cpulist Template:Cpulist Template:Cpulist |}

"Penryn", "Penryn-3M" (standard-voltage, 45 nm) Template:Anchors
  • All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), iAMT2 (Intel Active Management), IDA (Intel Dynamic Acceleration)
  • T6670, all T8xxx and T9xxx models support Intel VT
  • All T9xxx models support TXT
  • Note that the models T8100, T8300, T9300, T9500 are Penryn processors designed for Santa Rosa Refresh platforms with maximum FSB of 800 MHz, whereas the rest of the Penryn processors are designed for Montevina platforms that can go up to maximum FSB of 1066 MHz.
  • Penryn processors support Dynamic Front Side Bus Throttling between 400MT/s and 800MT/s.
  • Die size: 107 mm² (Penryn), 82 mm² (Penryn-3M)
  • Steppings: C0, E0 (Penryn) M0, R0 (Penryn-3M)

Template:Cpulist | Core 2 Duo T6400 || SLGJ4 (R0)|| 2000 MHz ||rowspan="5"|2 MB ||rowspan="11"|800 MT/s || 10x || rowspan="5"|1.00 - 1.25 V || 35 W || Socket P || rowspan="2"|January 6, 2009 || AW80577GG0412MA || OEM |- | Core 2 Duo T6500 || SLGF4 (R0) || 2100 MHz || 10.5x || 35 W || Socket P || AW80577GG0452ML
AW80577GG0452MA || OEM |- | Core 2 Duo T6570 || SLGLL (R0) || 2100 MHz || 10.5x || 35 W || Socket P || Q3, 2009 || AW80577GG0452MH || OEM |- | Core 2 Duo T6600 || SLGJ9 (R0)
SLGF5 (R0)|| 2200 MHz || 11x || 35 W || Socket P || January 6, 2009 || AW80577GG0492MA
AW80577GG0492ML|| OEM |- | Core 2 Duo T6670 || SLGLK (R0) || 2200 MHz || 11x || 35 W || Socket P || Q3, 2009 ||AW80577GG0492MH || OEM |- |rowspan=2| Core 2 Duo T8100 || SLAP9 (M0)
SLAVJ (M0)
SLAYP (M0)
SLAYZ (C0)
SLAUU (C0) ||rowspan=2| 2100 MHz ||rowspan=2| 3 MB ||rowspan=2| 10.5x ||rowspan=2| 1.00 - 1.250 V ||rowspan=2| 35 W || Socket P ||rowspan=2| January 6, 2008 || FF80577GG0453M (M0)
FF80576GG0453M (C0)
BX80577T8100 ||rowspan=2| $209 |- |SLAPS (M0)
SLAXG (M0)
SLAPT (C0)
SLAZD (C0) || FCBGA6 || EC80577GG0453M (M0)
EC80576GG0453M (C0) |- |rowspan=2|Core 2 Duo T8300 || SLAPA (M0)
SLAYQ (M0) ||rowspan=2| 2400 MHz ||rowspan=2| 3 MB ||rowspan=2| 12x ||rowspan=2| 1.00 - 1.250 V ||rowspan=2| 35 W || Socket P ||rowspan=2| January 6, 2008 || FF80577GG0563M ||rowspan=2| $241 |- |SLAPR (M0)
SLAPU (C0)
SLAZC (C0)|| FCBGA6 || EC80577GG0563M (M0)
EC80576GG0563M (C0) |- |rowspan=2| Core 2 Duo T9300 || SLAQG (C0)
SLAYY (C0) ||rowspan=2| 2500 MHz ||rowspan=2| 6 MB ||rowspan=2| 12.5x || 1.062 - 1.150 V ||rowspan=2| 35 W|| Socket P ||rowspan=2| January 6, 2008 || FF80576GG0606M ||rowspan=2| $316 |- |SLAPV (C0)
SLAZB (C0)|| 1.00 - 1.250 V || FCBGA6 || EC80576GG0606M |- |rowspan=2| Core 2 Duo T9400 || SLB46 (C0)
SLB4D (C0)
SLGE5 (E0)|| rowspan=2 | 2533 MHz || rowspan=2 | 6 MB || rowspan=2| 1066 MT/s || rowspan=2| 9.5x || rowspan=2| 1.050 - 1.162V || rowspan=2| 35 W || Socket P || rowspan=2| July 14, 2008 || AW80576GH0616M || rowspan=2| $316 |- | SL3BX (C0)
SLGEK (E0) || FCBGA6 || AV80576GH0616M |- |rowspan=2| Core 2 Duo T9500 || SLAQH (C0)
SLAYX (C0)||rowspan=2| 2600 MHz ||rowspan=2| 6 MB ||rowspan=2| 800 MT/s ||rowspan=2| 13x || 1.062 - 1.150 V||rowspan=2| 35 W || Socket P ||rowspan=2| January 6, 2008 || FF80576GG0646M ||rowspan=2| $530 |- | SLAPW (C0)
SLAZA (C0)
SLB49 (C0)
SLB4A (C0)
SLB4B (C0)|| 1.00 - 1.250 V|| FCBGA6 || EC80576GG0646M |- |Core 2 Duo T9550 || SLGE4 (E0)
SLGEL (E0)|| 2667 MHz || 6 MB || 1066 MT/s || 10x || 1.050 - 1.212V || 35 W || Socket P
FCBGA6 || December 28, 2008 || AW80576GH0676MG
AV80576GH0676MG || $316 |- |rowspan=2| Core 2 Duo T9600 || SLB47 (C0)
SLG8N (C0)
SLG9F (E0)|| rowspan=2 | 2800 MHz || rowspan=2| 6 MB || rowspan=2| 1066 MT/s || rowspan=2| 10.5x || rowspan=2| 1.050 - 1.162V || rowspan=2| 35 W || Socket P || rowspan=2| July 14, 2008 || AW80576GH0726M || rowspan=2|$530 |- | SLB43 (C0)
SLGEM (E0)|| FCBGA6|| AV80576GH0726M |- |Core 2 Duo T9800 || SLGES (E0)
SLGEP (E0) || 2933 MHz || 6 MB || 1066 MT/s || 11x || 1.050 - 1.212V || 35 W || Socket P
FCBGA6 || December 28, 2008 || AW80576GH0776MG
AV80576GH0776MG || $530 |- | rowspan=2|Core 2 Duo T9900 || SLGEE (E0) || rowspan=2|3066 MHz || rowspan=2|6 MB || rowspan=2|1066 MT/s || rowspan=2|11.5x || rowspan=2|1.050V-1.2125V || rowspan=2|35 W || Socket P || rowspan=2|April 28, 2009 || AW80576GH0836MG || rowspan=2|$530 |- | SLGKH (E0)|| FCBGA6|| AV80576GH0836MG Template:End

"Penryn", "Penryn-3M" (medium-voltage, 45 nm) Template:Anchors
  • All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), iAMT2 (Intel Active Management), Intel VT (except the non-Mac P7350, P7450), TXT, IDA (Intel Dynamic Acceleration)
  • Select Apple subsets of P7000 series processors support Intel VT.
  • Penryn and Penryn-3M processors support Dynamic Front Side Bus Throttling between 533MT/s and 1066MT/s.
  • Die size: 107 mm² (Penryn), 82 mm² (Penryn-3M)
  • Package size: 35 mm × 35 mm
  • Steppings: C0, E0 (Penryn) M0, R0 (Penryn-3M)

Template:Cpulist Template:Cpulist |- | rowspan=2| Core 2 Duo P7370 || rowspan=2| SLG8X (R0) || rowspan=2| 2000 MHz || rowspan=2| 3 MB || rowspan=2| 1066 MT/s || rowspan=2| 7.5x || rowspan=2| 1.00V - 1.250V || rowspan=2| 25 W || rowspan=2| Socket P || rowspan=2| January 2009 || AW80577SH0413M || rowspan=2| OEM |- | AW80577SH0413ML |- |Core 2 Duo P7450 || SLB45 (M0)
SLGF7 (R0)
SLB54 (C0) || 2133 MHz || 3 MB || 1066 MT/s || 8x || 1.00V - 1.250V || 25 W || Socket P || January 2009 || AW80577SH0463M
AW80576GH0463M (C0)|| OEM |- |Core 2 Duo P7550 || SLGVT
SLGF8 (R0) || 2266 MHz || 3 MB || 1066 MT/s || 8.5x || 1.00V - 1.250V || 25 W || Socket P || June 2009 || AW80577SH0513MA || OEM |- |Core 2 Duo P7570 || SLGLW (R0)|| 2266 MHz || 3 MB || 1066 MT/s || 8.5x || ?? || 25 W|| Socket P || Q3 2009 || AW80577SH0513ML || OEM |- | rowspan=2| Core 2 Duo P8400 || SLB3R (M0)
SLB3Q (M0)
SLB3R (M0)
SLB52 (M0)
SLG8Z (M0)
SLGCC (R0)
SLGCQ (R0)
SLGCF (R0)
SLGCL (R0)
SLCGC (R0)|| rowspan=2| 2266 MHz || rowspan=2 | 3 MB || rowspan=2 | 1066 MT/s || rowspan=2 | 8.5x || rowspan=2 | 1.00V - 1.250V || rowspan=2 | 25 W || Socket P || rowspan=2 | June 13, 2008 || AW80577SH0513M
AW80577SH0513MN
BX80577P8400 || rowspan=2| $209 |- | SL3BU (C0)
SLB4M (M0)
SLGE2 (R0) || FCBGA6 || AV80576SH0513M (C0)
AV80577SH0513M |- | rowspan=2| Core 2 Duo P8600 || SLB3S (M0)
SLGA4 (M0)
SLGFD (R0)
SLGDZ (R0)|| rowspan=2| 2400 MHz || rowspan=2 | 3 MB || rowspan=2 | 1066 MT/s || rowspan=2 | 9x || rowspan=2 | 1.00V - 1.250V || rowspan=2 | 25 W || Socket P || rowspan=2 | June 13, 2008 || AW80577SH0563M
BX80577P8600 || rowspan=2| $241 |- | SLB4N (M0)
SL3BV (C0)
SLGDZ (R0)|| FCBGA6 || AV80576SH0563M (C0)
AV80577SH0563M |- |Core 2 Duo P8700 || SLGFE (R0)
SLGFG (R0)|| 2533 MHz || 3 MB || 1066 MT/s || 9.5x || 1.00V - 1.250V || 25 W || Socket P
FCBGA6 || December 28, 2008 || AW80577SH0613MG
AV80577SH0613MG || $241 |- |Core 2 Duo P8800 || SLGLR (R0)
SLGLA (E0)|| 2667 MHz || 3 MB || 1066 MT/s || 10x || 1.00V - 1.250V || 25 W
35 W|| Socket P
FCBGA6 || Q2, 2009 || AW80577SH0673MG
AV80577SH0673MG
BX80577P8800|| $241 |- | Core 2 Duo P9500 || SLB4E (C0)
SLGE8 (E0)
SL3BW (C0) || 2533 MHz || 6 MB || 1066 MT/s || 9.5x || 1.050V - 1.162V || 25 W || Socket P
FCBGA6 || July 14, 2008 || AW80576SH0616M
AV80576SH0616M || $348 |- | Core 2 Duo P9600 || SLGE6 (E0)|| 2667 MHz || 6 MB || 1066 MT/s || 10x || 1.050V - 1.212V || 25 W || Socket P || December 28, 2008 || AW80576SH0676MG || $348 |- | Core 2 Duo P9700 || SLGQS (E0) || 2800 MHz || 6 MB || 1066 MT/s || 10.5x || 1.012V-1.175V || 28 W || Socket P || June 2009 || AW80576SH0726MG || $348 |}

"Penryn" (medium-voltage, 45 nm, Small Form Factor)

Template:Cpulist Template:Cpulist Template:Cpulist Template:Cpulist Template:End

"Penryn" (low-voltage, 45 nm, Small Form Factor)

Template:Cpulist Template:Cpulist |- | Core 2 Duo SL9380 || SLGA2 (C0)
SLGAD (E0) || 1800 MHz || 6 MB || 800 MT/s || 9x || 1.050 - 1.150 V || 17 W || FCBGA6 || September 2008 || AV80576LG0336M || $316 |- | Core 2 Duo SL9400 || SLB66 (C0)
SLGHD (C0)
SLGAB (E0) || 1866 MHz || 6 MB || 1066 MT/s || 7x || 1.050 - 1.150 V || 17 W || FCBGA6 || September 2008 || AV80576LH0366M || $316 |- | Core 2 Duo SL9600 || SLGEQ (E0) || 2133 MHz ||6 MB || 1066 MT/s || 8x || 1.050 - 1.150V || 17 W || FCBGA6 || Q1'09 || AV80576LH0466M || $316 Template:End

"Penryn-3M" (ultra-low-voltage, 45 nm, Small Form Factor)

Template:Cpulist Template:Cpulist Template:Cpulist Template:Cpulist Template:Cpulist Template:Cpulist Template:End

Core 2 Extreme

"Merom XE" (standard-voltage, 65 nm)

These models feature an unlocked clock multiplier

  • All models support: MMX, SSE, SSE2, SSE3, SSSE3, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), iAMT2 (Intel Active Management), Intel VT, TXT, Intel Dynamic Front Side Bus Frequency Switching
  • Merom XE processors support Dynamic Front Side Bus Throttling between 400 MHz and 800 MHz.
  • Die size: 143 mm²
  • Steppings: E1, G0

Template:Cpulist Template:Cpulist Template:Cpulist Template:End

"Penryn XE" (standard-voltage, 45 nm)
Template:CpulistTemplate:Cpulist
Model Number sSpec Number Clock Speed L2 Cache FSB Speed Clock Multiplier Voltage Range TDP Socket Release Date Part Number(s) Release Price (USD)

Quad-Core Notebook processors

Core 2 Quad

"Penryn QC" (standard-voltage, 45 nm)
  • All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), iAMT2 (Intel Active Management), Intel VT, TXT
  • Socket P processors are capable of throttling the FSB anywhere between 533-1066 MHz as necessary. Note that reports are stating this chip is a socket P' [sic] and as such may not be pin compatible with standard Socket P motherboards. Announcements closer to the time may clarify this situation.
  • Package size: 35 mm × 35 mm
  • Die size: 2 × 107 mm²
  • Steppings: E0

Template:Cpulist Template:Cpulist Template:Cpulist Template:End

Core 2 Extreme

"Penryn QC XE" (standard-voltage, 45 nm)
  • These models feature an unlocked clock multiplier usually manipulated through the systems BIOS however some manufacturers (such as HP) do not have this feature enabled on their laptops that use this processor.
  • All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), iAMT2 (Intel Active Management), Intel VT, TXT
  • Socket P processors are capable of throttling the FSB anywhere between 533-1066 MHz as necessary. Note that reports are stating this chip is a socket P' [sic] and as such may not be pin compatible with standard Socket P motherboards. Announcements closer to the time may clarify this situation.
  • Package size: 35 mm × 35 mm
  • Die size: 2 × 107 mm²
  • Steppings: E0

Template:Cpulist Template:Cpulist Template:End

See also

References

"Firebase - CrunchBase". CrunchBase. Retrieved June 11, 2014.

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External links

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